Pendekodean Kanal Reed Solomon Berbasis FPGA untuk Transmisi Citra pada Sistem Komunikasi Satelit Nano
Submission Date: 2013-02-06 09:50:25
Accepted Date: 2013-03-01 00:00:00
Abstract
Sistem komunikasi satelit saat ini sedang dikembangkan oleh mahasiswa-mahasiswi ITS, salah satunya yaitu Sistem komunikasi satelit nano 2,4 GHz untuk pengiriman citra. Untuk mengatasi kerusakan informasi yang diterima akibat noise selama transmisi, maka di stasiun bumi dibutuhkan pendekodean kanal Reed Solomon (255,239) untuk mendeteki dan mengoreksi informasi jika terjadi kesalahan pada informasinya. Dalam makalah ini bertujuan untuk merancang pendekodean kanal Reed Solomon(255,239) untuk diimplementasikan pada stasiun bumi. Pendekodean ini secara teori mampu mendeteksi dan mengoreksi maksimum 8 simbol error yang terjadi pada informasi. Pendekodean Reed Solomon(255,239) dirancang menggunakan bahasa pemrograman VHDL (VHSIC Hardware Description Language) dan dimasukkan kedalam board FPGA (Field-Programmable Gate Array). Pengujiannya dilakukan hanya secara simulasi dengan menginjeksikan error pada data informasi yang diterima oleh Reed Solomon(255,239) karena relatif sulit diuji dengan menambahkan error saat tahap implementasi. Secara simulasi pendekodean ini telah mampu mengoreksi sebanyak 8 simbol error sesuai dengn teori. Pada tahap implementasinya juga telah berhasil karena telah mampu menerima informasi yang sesuai dengan informasi yang dikirim dengan asumsi tidak terdapat error pada informasi.
Keywords
Reed Solomon (255,239); FPGA; citra; VHDL
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